1. Field of the Invention
The present invention relates to write driver circuits for magnetic recording. More particularly, the present invention relates to write driver circuits for high data rate magnetic recording and techniques for fabricating such write driver circuits.
2. Description of the Related Art
FIG. 1 shows a high RPM disk drive 10 having a magnetic read/write head (or a recording slider) that is positioned over a selected track on a magnetic disk 11 for recording data using a servo system. The stage servo system includes a voice-coil motor (VCM) 13 for coarse positioning a read/write head suspension 12 and may include a microactuator, or micropositioner, for fine positioning the read/write head over the selected track. FIG. 2 shows an enlarged exploded view of the read/write head end of suspension 12 in the case when a microactuator is also being used. An electrostatic rotary microactuator 14 is attached to a gimbal structure 15 on suspension 12, and a slider 16 is attached to the microactuator. A read/write head 17 is fabricated as part of slider 16.
For high data rate magnetic recording, the write path of a recording channel front-end requires a wide bandwidth and short waveform rise and fall times in order to accurately transfer high-frequency write data patterns to a magnetic medium, such as a disk. The write signal includes abrupt switching, that is, polarity reversals of the signal, that represent the information that is to-be-recorded. The abrupt switching generates high-frequency harmonics that must be transferred from the write driver to the magnetic write transducer (write head) in order that the write signal is accurately transferred onto the magnetic medium.
Conventional write drivers have a high output impedance, essentially forming a current source for the write current needed to drive an inductive write head. The output impedance is much greater than the head input impedance. FIG. 3 shows a conventional write driver circuit 30 that is connected directly to the (bonding) terminals of a magnetic write transducer (write head) 32 through a suspension interconnect 31. Write driver circuit 30 is configured as a current commutating write-driver circuit and includes two switches S and two switches {overscore (S)} that are connected in an H configuration. An obstacle in transferring the write data output signal from write driver circuit 30 to write head 32 is in the propagation of the write signal along interconnect 31 between write driver circuit 30 and the write head 32.
The invention described below improves the propagation of the write signal along an interconnect between a write driver circuit and a write head, while maintaining the signal integrity, i.e., the signal properties essential for high data rate writing.
The present invention provides a technique for improving propagation of the write signal along an interconnect between a write driver circuit and a write head. The advantages of the present invention are provided by a method for forming a termination for a magnetic write head in which a magnetic write coil has an inner turn and an outer turn that are formed on a wafer. A bottom capacitor plate for a capacitor is formed on the wafer using a liftoff process or subtraction patterning using ion milling. A resistor having a first terminal and a second terminal is also formed on the wafer using a liftoff process or ion milling. A dielectric layer is formed over the bottom capacitor plate for the capacitor using, for example, a liftoff process. A top capacitor plate is formed on the dielectric layer using a liftoff process or ion milling. An overpass lead is formed between the inner turn of the coil and one of the bottom capacitor plate and the top capacitor plate. The first terminal of the resistor is connected to the capacitor plate that is not connected to the inner turn of the write coil. The second terminal of the resistor is connected to the outer turn of the write coil. An impedance formed by the write coil, the capacitor and the resistor substantially equals a characteristic impedance Z0 of an interconnect circuit that will be connected to the write coil.
According to the invention, the capacitor and the resistor form a load termination network that is connected in parallel across the write coil. Further, the write coil has an inductance Lh and a resistance Rh, and the load termination network includes a first resistance R, a second resistance Rex and a capacitance C. The characteristic impedance Z0 of the interconnect circuit, the inductance Lh and the resistance Rh of the coil, and the first resistance R, the second resistance Rex and the capacitance C of the load terminated network are related by
Z0=R=Rex+Rh={square root over (Lh/C)}.
The present invention also provides a magnetic head that includes a substrate, a write coil formed on the substrate, and a load termination network for the coil formed on the substrate. The load termination circuit includes at least one of a capacitor and a resistor. Preferably, the load termination network includes a capacitor and a resistor that form a load termination network that is connected in parallel across the write coil so that an impedance formed by the write coil, the capacitor and the resistor substantially equals a characteristic impedance Z0 of an interconnect circuit that will be connected to the write coil.
According to another aspect of the present invention, a disk drive includes a write driver output stage, an interconnect circuit and a magnetic head. The write driver output stage has an output. The interconnect circuit has an input, an output and a characteristic impedance Z0. The input of the interconnect circuit is coupled to the write signal output of the write driver output stage. The magnetic head has an input that is coupled to the output of the interconnect circuit. The magnetic head includes a substrate, a write coil formed on the substrate, and a load termination network for the coil formed on the substrate. The load termination circuit includes at least one of a capacitor and a resistor. Preferably, the load termination network includes a capacitor and a resistor that form a load termination network that is connected in parallel across the write coil so that an impedance formed by the write coil, the capacitor and the resistor substantially equals the characteristic impedance Z0 of the interconnect circuit.